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this is information on a product in full production. december 2014 docid026474 rev 2 1/40 40 STBCFG01 switch mode single cell li+ battery charger with otg boost, voltage mode fuel gauge and ldo datasheet - production data features ? high efficiency switching battery charger ? 2 mhz or 3 mhz switching frequency ? 1.2 a max. charging current ? 20 v tolerant input with ovp ? programmable input current limitation and dynamic input current limit ? battery overvoltage protection ? auto-recharge ? integrated current sensing resistor ? usb compatible ? voltage mode fuel gauge ? external sensing resistor is not needed ? battery swap detection through id resistor ? low battery voltage and low soc programmable alarms ? 50 ma ldo for system boot in dead battery condition ? usb otg v bus generation (500 ma) ? usb overvoltage protection ? programmable battery overcurrent protection ? automatic 60 ma input pre-bias ? i2c compatible control interface ? interrupt output pin ? flip chip package, 25 bumps (2.3 x 2.2 mm) applications ? mobile phones ? smart phones description the STBCFG01 is a switching battery charger integrating the necessary functions to charge single cell li-ion batteries, monitor the battery charge and generate 5 v to supply usb otg bus powered devices. the ic also integrates the ldo regulator to support system boot in dead battery conditions. the battery charger features a smart input current limit: the maximum input current can be selected through i2c and if the input voltage drops below a programmable threshold, the input current is reduced even if the selected maximum current limit has not been reached yet. the dynamic input current limit can be disabled. an automatic input pre-bias load makes the device suitable for applications using voltage sources with a minimum external load for the right regulation. the STBCFG01 also integrates a voltage mode fuel gauge to provide the state of charge evaluation without the current sensing resistor. flip chip 25 (2.3 x 2.2 mm) table 1. device summary order code package packaging STBCFG01jr flip chip 25 (2.3 x 2.2 mm) tape and reel www.st.com
contents STBCFG01 2/40 docid026474 rev 2 contents 1 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 operation description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 battery charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.1 input current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1.2 dynamic input current limit (dicl) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1.3 automatic recharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1.4 battery detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1.5 battery overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2 otg boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.3 ldo regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.4 pre-bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.5 fuel gauge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.5.1 operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5.2 battery connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5.3 low battery alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5.4 battery swap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.6 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.7 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.8 watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.9 alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 i2c compatible interface registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.1 fuel gauge registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.2 charger/otg/ldo registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
docid026474 rev 2 3/40 STBCFG01 contents 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
list of tables STBCFG01 4/40 docid026474 rev 2 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. typical external components table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 8. fuel gauge mode register (address: 00h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 9. fg_ctrl register (address: 01h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 table 10. soc register lsb (register address: 02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 11. soc register msb (register address: 03h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 12. vbat register lsb (register address: 08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 13. vbat register msb (register address: 09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 14. ocv register lsb (register address: 0dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 15. ocv register msb (register address: 0eh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 16. vm_cnf register lsb (register address: 11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 17. vm_cnf register msb (register address: 12h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 18. alarm_soc register (address: 13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 19. alarm_voltage register (address: 14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 20. chg_cfg1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 21. chg_cfg2 register (address: 91h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 22. chg_cfg3 register (address: 92h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 23. chg_cfg4 register format (register address: 93h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 24. chg_cfg5_otg_status register format (register address: 94h) . . . . . . . . . . . . . . . . . . . . 32 table 25. chg_status1 register format (register address: 95h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 26. chg_status2 register format (register address: 96h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 27. int_enable_1 register format (register address: 97h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 28. int_enable_2 register format (register address: 98h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 29. int_latch_1 register format (register address: 99h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 30. int_latch_2 register format (register address: 9ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 31. flip chip 25 (2.3 x 2.2 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 32. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
docid026474 rev 2 5/40 STBCFG01 list of figures list of figures figure 1. application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. simplified charger architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 4. cc/cv charging cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 5. dicl activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 6. dicl enable strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 7. battery charger flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 8. pre-bias enable strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 9. battery swap detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 10. flip chip 25 (2.3 x 2.2 mm) drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 11. flip chip 25 (2.3 x 2.2 mm) recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
application schematic STBCFG01 6/40 docid026474 rev 2 1 application schematic figure 1. application diagram table 2. typical external components table component name size value supplier part number c1 0603 10f, 16v murata grm188r61c106ma73d c2 0603 4.7f, 25v tdk c1608x5r1e475k080ac c3 0402 1f, 16v murata grm155r61c105ka12d c4 0603 4.7f, 25v tdk c1608x5r1e475k080ac c5 0603 1f, 16v murata grm185r61c105ke44 c6 0603 10f, 16v murata grm188r61c106ma73d c7 0603 100nf, 25v murata grm188r71h104ka93 c8 0603 1f, 16v murata grm185r61c105ke44 c9 0603 1f, 16v murata grm185r61c105ke44 l1 2.5*2 mm 1h, 2.2a tdk vls252012et-1r0n gipg3105141046lm
docid026474 rev 2 7/40 STBCFG01 pin configuration 2 pin configuration figure 2. pin connections (top view) table 3. pin description symbol ball pin function description pmid a1, b1 power i/o reverse blocking mosfet to high-side connection node dcin a2, a3 power i/o input supply voltage/otg output agnd a4 analog ground analog ground vcell- a5 analog input battery pack negative terminal sense input cenn b2 digital input charger enable, active low. internal 200 k ? pull-down to gnd shdn b3 digital input shutdown input, active high. internal 200 k ? pull-down to gnd rid b4 analog input battery identification resistor connection (for battery detection). an external bias has to be applied vcell+ b5 analog input battery pack positive terminal sense input lx c1, d1 power i/o switch mode, inductor connection irqn c2 digital input open drain interrupt output, active low dgnd c3 digital ground digital ground gipg3005141049lm
pin configuration STBCFG01 8/40 docid026474 rev 2 1v8 c4 analog out 1.8 v internal regulator bypass pin. bypass this pin to gnd with a capacitor of 220 nf. do not connect any load vref c5 analog out reference voltage bypass pin. do not connect any load ldo d2 analog out 4.85 v ldo output sda d3 digital i/o i2c data pin to the baseband, i2c master peripheral scl d4 digital input i2c clock pin to the baseband, i2c master peripheral r_sns_n d5, e5 power i/o internal sense resistor, negative terminal pgnd e1, e2 power ground power ground r_sns_p e3, e4 power i/o internal sense resistor, positive terminal table 3. pin description (continued) symbol ball pin function description
docid026474 rev 2 9/40 STBCFG01 maximum ratings 3 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. table 4. absolute maximum ratings symbol parameter value unit v dcin , v pmid charger input voltage -1.5 to +20 v v lx switch mode voltage -0.3 to +8 v vcell+, r _sns_n, r _sns_p battery pin -0.3 to +6 v v vref , v v1v8 , v cenn , v shdn low voltage pins -0.3 to +2.1 v v amr all other pin input voltage -0.3 to +5.5 v esd human body model 2000 v charged device model 250 v t amb operating ambient temperature -30 to +85 c t j maximum junction temperature +125 c t stg storage temperature -65 to +150 c table 5. thermal data symbol parameter value unit r thjc thermal resistance junction-case tbd c/w r thja thermal resistance junction-ambient tbd c/w
electrical characteristics STBCFG01 10/40 docid026474 rev 2 4 electrical characteristics t j = - 30 c to 85 c, v bat = 3.6 v, v dcin = 5 v unless otherwise specified. table 6. electrical characteristics symbol parameter conditions min. typ. max. unit general information v in dcin input voltage range 3.78 5.95 v f sw switching frequency fsw bit = 0 2 mhz fsw bit = 1 3 t sd thermal shutdown threshold 165 c hysteresis 20 t tsd thermal shutdown deglitch time 50 s battery charger i in current consumption from dcin charger enabled, switching, v bus_con = 5 v 14 ma shutdown, ldo disabled 290 400 a shutdown, ldo enabled 500 800 a i bat current consumption from bat (including fuel gauge) on battery power v bus_con =0 v gg_run = 0 10 25 a on battery power v bus_con =0 v gg_run = 1 32 100 a v inovp dcin overvoltage protection v dcin rising 6.05 6.3 6.62 v v dcin falling 5.95 6.2 6.51 v inovp_pb pre-bias overvoltage protection v dcin rising 7.0 v v dcin falling 6.9 v pre-bias ovp accuracy -5 +5 % v inuvlo dcin undervoltage lockout v dcin rising 3.6 v v dcin falling 3.5 dcin uvlo accuracy -5 +5 % i preb pre-bias current 60 ma
docid026474 rev 2 11/40 STBCFG01 electrical characteristics t pbd pre-bias current enable deglitch time v dcin rising over v inovp but below v inovp_pb 5ms t hdo hold-off time valid dcin connection to charging start 200 ms v asd automatic shutdown threshold v asd = v dcin -v bat , v dcin rising 130 mv v asd = v dcin -v bat , v dcin falling 036 mv t asd automatic shutdown threshold deglitch time 50 s i inlim dcin current limit i lim configurable by i 2 c 90 ma 476 760 1140 v dicl dynamic input current limit threshold dicl configurable by i 2 c (4.0 v, 4.25 v, 4.5 v, 4.75 v) 4.0 4.75 v dicl accuracy -3 +3 % t dicl dicl activation deglitch time 100 ms v float cv regulation voltage v bus_con = 5 v 3.52 4.78 v cv regulation voltage accuracy v bus_con = 5 v -1 +1 % v fld cc to cv threshold deglitch time 170 ms v rchg auto-recharge threshold voltage archg bit = 1 v float - 0.12 v auto-recharge threshold accuracy archg bit = 1 -17 +17 % t rchg auto-recharge threshold deglitch time archg bit = 1 170 ms v batovp battery overvoltage protection this is got by increasing the battery voltage until batovp status register turns on v float + 0.1 v battery ovp accuracy -10 +10 % t bovp battery ovp deglitch time 170 ms i trk trickle charge current v bat < v trk 45 ma trickle charge current accuracy -20 +20 % table 6. electrical characteristics (continued) symbol parameter conditions min. typ. max. unit
electrical characteristics STBCFG01 12/40 docid026474 rev 2 i pre pre-charge current v trk < v bat < v pre 450 ma pre-charge current accuracy -10 +10 % i fast fast charge current v bat > v pre 550 1250 ma fast charge current accuracy -10 10 % i term termination current 50 300 ma termination current accuracy -30 30 % t term charge termination deglitch time 170 ms v trk trickle charge to pre-charge battery voltage threshold 2v v trk accuracy -5 +5 % t tpd trickle charge to pre-charge threshold deglitch time 100 ms v pre pre-charge to fast charge battery voltage threshold 3v v pre accuracy -5 +5 % t pfd pre-charge to fast charge threshold deglitch time 170 ms v deth battery detection high threshold 3v v detl battery detection low threshold 2v i detsnk sink detection current -5 ma t detsrc current source detection time 340 ms t detsnk current sink detection time 200 ms r on_hi high-side mosfet on- resistance (including reverse blocking mofet) 300 m ? r on_low low-side mosfet on- resistance 125 m ? r sns internal sensing resistor 35 68 m ? t maxpre maximum pre-charge time including trickle charge 45 min t maxchg maximum fast charge time including taper charge 360 min otg boost regulator i bq boost quiescent current v bat = 3.7 v, no load 4ma v bus output voltage at v bus_con 4.75 5 5.25 v table 6. electrical characteristics (continued) symbol parameter conditions min. typ. max. unit
docid026474 rev 2 13/40 STBCFG01 electrical characteristics i vbus output current capability v bus 4.75 v 500 ma v batuvlo battery undervoltage lock-out falling edge 3v accuracy -5 +5 % v busovp output overvoltage protection 6v accuracy -5 +5 % t vbusovp v busovp deglitch time 30 ms i batlim battery average current limitation 350 950 ma accuracy -10 +10 % i lmax cycle-by-cycle limitation 1.2 a z 0 output impedance in off mode 100 k ? ldo output v ldo ldo output voltage i ldo = 50 ma, v dcin - v ldo > 300 mv 4.85 v accuracy -4 +4 % i ldo ldo output current v dcin - v ldo > 300 mv 50 ma i sc ldo short-circuit current v ldo 4 v 75 ma accuracy -27 +27 % v do ldo dropout voltage i ldo = 50 ma 150 300 mv v inmin ldo input undervoltage lockout v dcin rising 3.6 v v dcin falling 3.5 v inmin accuracy -5 +5 % v inmax ldo input overvoltage lockout v dcin rising 6.3 v v dcin falling 6.2 v inmax accuracy -5 +5 % fuel gauge i fgq fuel gauge quiescent current gg_run = 1 25 a gg_run = 0 2 table 6. electrical characteristics (continued) symbol parameter conditions min. typ. max. unit
electrical characteristics STBCFG01 14/40 docid026474 rev 2 uvlo fuel gauge undervoltage lock-out rising edge 2.0 2.6 2.7 v hysteresis 100 mv f osc internal time base frequency 512 khz time base accuracy 1% t strb adc conversion strobe 4s t swap battery swap deglitch time 1s v baterr v bat measurement error -0.5 +0.5 % v batres v bat measurement resolution ocv reading 2.69 mv v batrng v bat measurement range 2.5 5.5 v v ridth rid threshold 1.2 1.25 1.3 v hysteresis 0.130 v i2c compatible interface v ih high level input voltage 1.3 v v il low level input voltage 0.6 v v ol low level output voltage at 10 ma sink current for open drain i/o 0.3 v c io i/o pin capacitance 10 pf f scl scl clock frequency 400 khz t low minimum clock low period 1.3 s t high minimum clock high period 600 ns t f sda and scl fall time 300 ns t hold_sta start condition hold time 600 ns t su_sta start condition set-up time 600 ns t su_dat data set-up time 100 ns t hold_dat data hold time 0s t su_sto stop condition set-up time 600 ns t buf minimum delay between operations 1.3 s digital interface v ih input high threshold 1.3 v table 6. electrical characteristics (continued) symbol parameter conditions min. typ. max. unit
docid026474 rev 2 15/40 STBCFG01 electrical characteristics note: dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mv below its nominal value. v il input low threshold 0.6 v v ol output low threshold 0.3 v i in_io i/o pin input current -10 +10 a table 6. electrical characteristics (continued) symbol parameter conditions min. typ. max. unit
operation description STBCFG01 16/40 docid026474 rev 2 5 operation description 5.1 battery charger the STBCFG01 integrates a high efficiency battery charger of 1.2 a implementing the cc/cv charging algorithm for single cell li-ion battery powered applications. the switching frequency can be either 2 mhz or 3 mhz, according to platform noise requirements, and the inductor value is 1 h. the charging current sensing resistor is integrated. figure 3. simplified charger architecture when the battery is deeply discharged (vcell+ < v trk , v trk = 2 v) the device is in trickle charge mode and charges the battery in linear mode with a low current (i trk = 45 ma) up to the trickle charge threshold. as soon as the battery voltage enters the pre-charge range (v trk < vcell+ < v pre , v pre = 3 v) the device starts the switch mode charging and increases the charging current up to the pre-charge current level (i pre ) to make the system voltage rise quickly up to a level which allows the system to wake up. the typical value for the pre-charge current is 450 ma but this value can be decreased to 100 ma through the i2c compatible interface. a 45 minute (typ.) safety timer is active during both trickle charge and pre-charge. when the battery voltage is above the pre-charge threshold, the STBCFG01 enters fast charge mode and increases the charging current up to i fast value. the fast charge current can be programmed through the i2c compatible interface between 550 ma and 1.2 a in 100 ma steps. a soft-start function makes the battery current increase smoothly when the charging current changes. am17100v1 pwm ldo battery pack system rid bias adc ldo output sda scl irqn cenn shd rid vcell- vcell+ rsnsn rsnsp pgnd lx pmid iin sense ichg sense analog blocks and supply logic dgnd dcin agnd vref 1v8 pre- bias vbat osc.
docid026474 rev 2 17/40 STBCFG01 operation description the constant voltage mode enters when the battery voltage reaches the programmable floating voltage threshold (v float , 3.60 v to 4.70 v in 20 mv steps). in constant voltage mode, the charging current tapers down the termination current threshold and then the charging process stops. the termination current is programmable from 50 ma to 300 ma in 25 ma steps. a 360 minute (typ.) safety timer is active when the fast charge starts. the charger can be disabled pulling high the charger enable input (cenn) and is automatically stopped in automatic shutdown conditions (asd, v dcin - v bat < v asd ). figure 4. cc/cv charging cycle 5.1.1 input current limit the STBCFG01 implements a programmable input current limitation to prevent the battery charger from exceeding dcin voltage source current capability. the current limit can be programmed through i2c to the following maximum values: 100 ma, 500 ma, 800 ma, 1.2 a. a ?no limit? option is also available. 5.1.2 dynamic input current limit (dicl) independently from the chosen input current limit, a dynamic input current limit loop can also be enabled through the i2c compatible interface (dicl_en bit). when dicl is active, an analog loop limits the input current when the input voltage drops to a programmable threshold (v dicl = 4.0 v to 4.75 v in 250 mv steps). am17101v1 t i bat v bat v float v pre i fast i pre i term trk pre fast off cc cv taper i trk v trk off cc = constant current cv = constant voltage trk = trickle charge (linear) pre = pre-charge fast = fast charge taper = taper charge plot not to scale! = linear charging
operation description STBCFG01 18/40 docid026474 rev 2 figure 5. dicl activation when a valid input source is connected to dcin, dicl is enabled only if the input voltage is higher than v dicl for a deglitch time (t dicl = 100 ms). the user can check the enabling status of dicl function reading dicl status bit. once dicl is enabled it can be disabled through dicl_en bit. figure 6. dicl enable strategy am17102v1 t i dcin v dcin v dicl i inlim dicl active programmed i inlim is higher than the actual input source current capability : dicl is activated when the input voltage drops to v dicl am17103v1 t t v dcin v dicl v dcin is higher than v dicl for more than t dicl (100 ms): dicl is enabled , the charger starts after the hold - off time. i chg v inuvlo t dicl t hdo dicl_en bit = 1 v dcin v dicl v dcin is higher than v dicl for less than t dicl (100 ms): dicl is disabled, the charger starts after the hold - off time. i chg v inuvlo t dicl t hdo dicl_en bit = 1
docid026474 rev 2 19/40 STBCFG01 operation description 5.1.3 automatic recharge when the charging cycle is over, the device keeps monitoring the battery voltage: if the voltage drops below the auto-recharge threshold (v rchg = v float - 120 mv), a new charging cycle starts to keep the battery at maximum capacity. the automatic recharge function can be disabled through i2c. 5.1.4 battery detection the battery charger ic features a battery detection function to check if a battery is inserted before starting the charging cycle and to make sure that charging termination is not triggered because of a battery disconnection. if the battery is not detected when the input voltage is valid, the device keeps running the detection sequence until a battery is inserted. the battery detection result is reported by det_ok bit. if the battery detection function or rid comparator detects a battery disconnection, bat_fail interrupt is generated. see the battery detection algorithm flowchart for more details.
operation description STBCFG01 20/40 docid026474 rev 2 figure 7. battery charger flowchart 5.1.5 battery overvoltage protection if the battery voltage exceeds the battery overvoltage protection threshold (v batovp = v float + 100 mv) for more than t bovp , the charging cycle stops and an alarm is generated. the battery overvoltage protection is active only when the charger is enabled. the charger automatically restarts when the battery voltage falls below the battery overvoltage protection threshold. am17105v1 por v dcin valid and cenn=0 and shd=0? no yes run battery detection battery connected ? no yes start trickle charge start pre - charge timer ( t pre ) vcell+ > v trk yes start pre- charge t pre expired ? no yes no set alarm stop charger vcell+ > v pre t pre expired ? no yes no yes start fast - charge start fast - charge timer ( t fast ) vcell+ < v float t fast expired ? yes yes no no start taper charge (cv) i bat < i term ? t fast expired ? no yes no yes stop charger run battery detection (sink) battery connected ? no yes end of charge auto - recharge enabled ? no yes vcell+ < v rchg ? no yes wait hold-off time
docid026474 rev 2 21/40 STBCFG01 operation description 5.2 otg boost the STBCFG01's internal bridge can be used in boost configuration to generate usb otg v bus voltage (5 v, 500 ma). otg boost generator can be enabled setting the dedicated i2c enable bit (otg_en) according to the following conditions: ?v dcin < v inuvlo ? cenn = high ? vcell+ > v batuvlo otg boost operation is automatically stopped if the battery voltage falls below v batuvlo or if cenn is pulled low during operation. the device also features an output overvoltage protection which turns off otg boost if the output voltage rises above v busovp . if the overvoltage lasts for more than t vbusovp , otg boost is disabled and an alarm is generated. together with the standard cycle-by-cycle current limit for the inductor peak current, the STBCFG01 also implements an average battery current limitation to avoid excessive battery voltage drop during peaks in system current consumption. when the average boost input current reaches the programmed limit (i batlim = 350 ma, 450 ma, 550 ma, 950 ma), otg boost is disabled and an alarm is generated. 5.3 ldo regulator the STBCFG01 integrates a 4.85 v, 50 ma ldo regulator which is active when dcin voltage is higher than v inmin and lower then v inmax . ldo is also active when the battery is not connected and in otg mode, while it is turned off in automatic shutdown conditions (v dcin - vcell+ < v asd ). ldo function can be disabled through i2c and its output is protected against short-circuit. 5.4 pre-bias in order to allow proper functionality with input sources not integrating the necessary minimum load to provide a valid voltage, the STBCFG01 integrates an automatic pre-bias circuit: if the input voltage (v dcin ) is above the input ovp threshold but lower than the pre- bias ovp threshold (v inovp < v dcin < v inovp_pb ) a pre-bias current is applied to dcin to attempt reducing the input voltage down to a valid level. during the charging cycle, if the pre-bias current has been activated, it is kept on only during trickle charge and taper charge. the pre-bias current is also turned off in automatic shutdown conditions (asd). the pre-bias current is active only if the input voltage is in the activation range for at least t pbd (5 ms typ.). the pre-bias function can be disabled through i2c.
operation description STBCFG01 22/40 docid026474 rev 2 figure 8. pre-bias enable strategy 5.5 fuel gauge the voltage mode fuel gauge provides the accurate information about the state of the lithium-ion battery. battery voltage is constantly monitored to evaluate the state of charge of battery and open circuit voltage. at power-up, the fuel gauge algorithm uses the voltage reading to provide a first evaluation of soc based on battery modeling data. the evolution of voltage is then used to track the changes of soc of battery while cycling. the external software driver performs the temperature compensation. initial accuracy depends on the state of the battery. when the fuel gauge is activated the battery is supposed to be in fully relaxed state. if the battery is not fully relaxed the initial error in the evaluation of the state of charge is high but converges to lower values while the battery is being used. the fuel gauge block can be adapted to different batteries. programmable parameters are used to tailor the algorithm to each battery model. in order to keep the optimal performance and avoid losing information learned during battery cycling, the user is supposed to save data contained in the device's volatile memory when power is removed. the same data has to be restored at power-up. am17107v1 drawing not to be scaled pre-bias enable vs. charging cycle pre-bias enable vs. vdcin
docid026474 rev 2 23/40 STBCFG01 operation description the STBCFG01 also provides programmable alarms to notify low battery voltage and low soc conditions. 5.5.1 operating mode at start-up and when the battery voltage is below uvlo threshold, the fuel gauge is in standby mode. this block is activated when the battery voltage is above uvlo and gg_run bit has been set through i2c. when the fuel gauge is in standby mode, all register values are frozen and the algorithm doesn?t run. in active mode, a voltage reading is acquired every 4 seconds (t strb ). 5.5.2 battery connection when a battery is connected, the device wakes up and attempts reading the battery voltage before high current loads can change the open circuit voltage. the charging process is inhibited until the battery voltage reading is completed. if the battery voltage is too low, the charger is not inhibited to allow the battery to be charged up to a stable voltage and avoid oscillations. 5.5.3 low battery alarms the voltage mode fuel gauge provides low soc and low battery voltage alarms, which are notified to the host through the active low open drain interrupt register (irqn). both of alarms can be disabled clearing alrm_en bit in fg_mode register. low battery voltage threshold and low soc threshold can be changed writing alarm_voltage and alarm_soc registers. the default thresholds are 3.00 v battery voltage and 1% soc. when a low battery voltage condition or a low soc condition is detected and alarms are enabled, the corresponding bit in fg_ctrl register is set (alrm_vbat or alrm_soc) and irqn output is pulled low. alrm_vbat and alrm_soc bits have to be cleared by the host to release the interrupt pin (if no other interrupt is active in the device). if the alarm is cleared while the alarm condition is still true, the device doesn?t generate another interrupt: the alarm condition has to disappear and be detected again in order to generate another interrupt. at power-up or when the fuel gauge is reset, fuel gauge alarms are enabled and alarms are generated after the first ocv reading and soc estimation (if the alarm condition is true). 5.5.4 battery swap when the battery is removed from the system, the fuel gauge is reset to avoid providing wrong battery information if a different battery is inserted. in order to detect battery disconnection, the STBCFG01 monitors both the battery voltage (vcell+) and the voltage on rid pin connected to the battery identification resistor. all volatile memory information is always lost when the battery voltage falls below por threshold.
operation description STBCFG01 24/40 docid026474 rev 2 figure 9. battery swap detection 5.6 thermal shutdown in any working condition, if the die temperature reaches the thermal shutdown threshold (t sd = 165 c typ.) the device enters shutdown mode: the bridge and ldo output turn off. the fuel gauge keeps working normally. the operation is automatically restored when the temperature falls back into the valid range. safety timers are reset when a thermal shutdown is triggered. 5.7 shutdown mode when shdn pin is tied high the device enters shutdown mode. in this mode, the switching converter turns off and it cannot be used neither in charging mode nor otg boost mode. ldo and fuel gauge functionality are not affected by shdn pin. t v rid vcell+ uvlo short battery removal volatile memory is not reset. por v ridth t<1s t>1s t<1s long battery removal volatile memory is reset. battery discharge under por volatile memory is reset. t v rid vcell+ uvlo short battery removal volatile memory is not reset. por v ridth t<1s t>1s t<1s long battery removal without uvlo event volatile memory is reset. batterydischargeunder uvlo and above por volatile memoryis not reset. gipg3005141246lm
docid026474 rev 2 25/40 STBCFG01 operation description 5.8 watchdog a watchdog timer function can be enabled to reset the programmable register values to power-on reset values if no i2c acknowledgments are generated for more than 45 seconds. this function is normally disabled. 5.9 alarms the STBCFG01 provides an open drain active low interrupt output (irqn) to notify the application processor about abnormal operating conditions or generic events. the following register types check the status of alarms and control the device: ? interrupt enable ? interrupt latch the interrupt enable registers enable the propagation of alarms to the interrupt pin (irqn). the interrupt is generated (irqn pulled low) on a rising edge of the interrupt latch bits (assuming that the corresponding enable bit has been set). the interrupt latch registers show the alarm conditions, which generate the interrupt. although the alarm condition is no longer active, once each latch register bit is set, it stays high until the register is updated. interrupt latch registers are updated by writing 0 to their bits: if the alarm condition is still active the bit is kept to 1 (new interrupt is not generated); if the alarm condition is no more active the bit is cleared. this update method assures that no further rising edge on the latch bit is generated for alarms which have already been signaled before the update operation. in order to release irqn line after an interrupt generated by the charger/otg, the host processor has to write 0 to irq_clr bit in chg_cfg2 register and then back 1. the fuel gauge generated alarms share the same enable bit (alrm_en) as described in section 5.5.3 . the following conditions generate an interrupt signal: ? dcin uvlo ? dcin ovp ? asd condition ? pre-charge timer expiration ? fast charge timer expiration ? watchdog timer expiration ? battery overvoltage protection (charger) ? end of charge ? battery undervoltage lockout (otg boost) ?v bus overvoltage protection (otg boost) ? average current limit reached (otg boost, i batlim ) ? otg output short-circuit; thermal shutdown ? low battery voltage (fuel gauge) ? low soc (fuel gauge)
i2c compatible interface registers STBCFG01 26/40 docid026474 rev 2 6 i2c compatible interface registers the STBCFG01 can be monitored and controlled using the i2c compatible communication interface. the 7-bit device slave address is 1110001 bin . ta ble 7 shows the register map. table 7. register map name address por value r/w fuel gauge fg_mode 00h 19h r/w fg_ctrl 01h 15h r/w soc 02h-03h 0000h r/w vbat 08h-09h 0000h r ocv 0dh-0eh 0000h r vm_cnf 11h-12h 0141h r/w alarm_soc 13h 02h r/w alarm_voltage 14h aah r/w reg_id 18h 14h r ram0?ram15 20h?2fh - r/w ocv_adj 30h?3fh - r/w lut 5dh?8ch - r/w charger/otg chg_cfg1 90h 00h r/w chg_cfg2 91h 62h r/w chg_cfg3 92h 61h r/w chg_cfg4 93h 4fh r/w chg_cfg5_otg_status 94h 06h r/w chg_status1 95h 00h r chg_status2 96h c0h r int_enable_1 97h 00h r/w int_enable_2 98h 00h r/w int_latch_1 99h 00h r/w int_latch_2 9ah 00h r/w
docid026474 rev 2 27/40 STBCFG01 i2c compatible interface registers 6.1 fuel gauge registers alrm_en: fuel gauge alarm enable ? 0: disabled ? 1: enabled (default) gg_run: fuel gauge operative mode ? 0: standby (default). registers are frozen, fuel gauge in standby ?1: running lpm_dis: low power mode disable (set this bit to program battery charger/otg configuration registers and enable otg function when usb input is not plugged and gg_run = 0) ? 0: low power mode enabled (default) ? 1: low power mode disabled otg_en: otg boost enable bit ? 0: disabled (default) ? 1: enabled iodata: irqn pin status read: ? 0: irqn pin is low ? 1: irqn pin is high write: ? 0: forces irqn pin low ? 1: irqn pin is driven by interrupt logic bat_fail: battery removal or battery uvlo detection bit. write 0 to clear ? 0: battery connected ? 1: battery removed or uvlo por_det: power-on reset detection bit. write 1 to force a soft reset (self-clearing) ? 0: no por event occurred ? 1: por event occurred table 8. fuel gauge mode register (address: 00h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w - otg_en lpm_dis gg_run alrm_en - - - 19h r/w table 9. fg_ctrl register (address: 01h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w - alrm_vbat alrm_soc por_det bat_fail - iodata 15h r/w
i2c compatible interface registers STBCFG01 28/40 docid026474 rev 2 alrm_soc: low soc alarm ?0: soc ok ?1: low soc note: write this bit to 0 to clear the alarm. if the alarm condition is still active a new alarm is triggered only on the following rising edge of the alarm condition (the alarm condition has to disappear and then appear again). alrm_vbat: low battery voltage alarm ? 0: battery voltage above threshold ? 1: low battery voltage note: write this bit to 0 to clear the alarm. if the alarm condition is still active a new alarm is triggered only on the following rising edge of the alarm condition (the alarm condition has to disappear and then appear again). soc register lsb: 1/512% soc vbat register lsb: 2.69 mv table 10. soc register lsb (register address: 02h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w soc[7:0] 00h r/w table 11. soc register msb (register address: 03h) b15 b14 b13 b12 b11 b10 b9 b8 por r/w soc[1:8] 00h r/w table 12. vbat register lsb (register address: 08h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w vbat[7:0] 00h r table 13. vbat register msb (register address: 09h) b15 b14 b13 b12 b11 b10 b9 b8 por r/w reserved vbat[10:8] 00h r table 14. ocv register lsb (register address: 0dh) b7 b6 b5 b4 b3 b2 b1 b0 por r/w ocv[7:0] 00h r
docid026474 rev 2 29/40 STBCFG01 i2c compatible interface registers ocv register lsb: 0.67 mv alarm_soc register lsb: 0.5% alarm_voltage register lsb: 21.49 mv 6.2 charger/otg/ldo registers ifast: fast charge current ? offset: 550 ma ? lsb: 100 ma ? range: 550 ma to 1250 ma ? default: 550 ma (000) table 15. ocv register msb (register address: 0eh) b15 b14 b13 b12 b11 b10 b9 b8 por r/w reserved ocv[12:8] 00h r table 16. vm_cnf register lsb (register address: 11h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w vm_cnf[7:0] 41h r/w table 17. vm_cnf register msb (register address: 12h) b15 b14 b13 b12 b11 b10 b9 b8 por r/w vm_cnf[15:8] 01h r table 18. alarm_soc register (address: 13h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w alarm_soc 02h r/w table 19. alarm_voltage register (address: 14h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w alarm_voltage aah r/w table 20. chg_cfg1 register b7 b6 b5 b4 b3 b2 b1 b0 por r/w iterm ipre ifast 40h r/w
i2c compatible interface registers STBCFG01 30/40 docid026474 rev 2 ipre: pre-charge current: ? 0: 450 ma (default) ? 1:100 ma iterm: termination current ? offset: 50 ma ? lsb: 25 ma ? range: 50 ma to 300 ma ? default: 150 ma (0100) ? values 1011 through 1111: reserved vfloat: floating voltage ? offset: 3.52 v ? lsb: 20 mv ? range: 3.52 v to 4.78 v ? default: 3.52 v (000000) archg: automatic recharge enable ? 0: disabled ? 1: enabled (default) irq_clr: clear interrupt latch ? 0: clear interrupt latch ? 1: propagate interrupt (default) iin_lim : input current limit (dcin) ? 000: max.100 ma ? 001: max. ? 500 ma (default) ? 010: max. 800 ma ?011: max. 1.2 a ? 100: no limit ? values 101 through 111: reserved dicl_en : dynamic input current limit enable ? 0: disabled (default) ? 1: enabled table 21. chg_cfg2 register (address: 91h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w irq_clr archg vfloat c0h r/w table 22. chg_cfg3 register (address: 92h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w ibatlim vdicl dicl_en iin_lim 61h r/w
docid026474 rev 2 31/40 STBCFG01 i2c compatible interface registers vdicl : dynamic input current limit threshold ? 00: 4.00 v ? 01: 4.25 v ? 10: 4.50 v (default) ? 11: 4.75 v ibatlim : otg average battery current limit ? 00: 350 ma ? 01: 450 ma (default) ? 10: 550 ma ? 11: 950 ma tpre : pre-charge timer enable ? 0: disabled ? 1: enabled (default) tfast : fast charge timer enable - 0: disabled - 1: enabled (default) thrml : thermal loop enable (this bit can be masked through otp) ? 0: disabled ? 1: enabled (default) preb_en : pre-bias function enable ? 0: disabled ?1: enabled (default) wd: watchdog timer function enable ? 0: disabled (default) ? 1: enabled ldo_uvlo_th : ldo uvlo threshold ?0: 3.6 v rising, 3.5 v falling (default) ? 1: 4.75 v rising, 4.65 v falling ldo_en : ldo output enable ? 0: ldo output disabled ?1: ldo output enabled (default) rid_stat: rid status (read only) ? 0: rid connected ? 1: rid disconnected table 23. chg_cfg4 register format (register address: 93h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w rid_stat ldo_en ldo_uvlo_th wd preb_en thrml tfast tpre 4fh r/w
i2c compatible interface registers STBCFG01 32/40 docid026474 rev 2 note: b0, b1, b2 are r/w; b4, b5, b6, b7 are read status bit only. chg_rst: charger reset, all charger registers to por value. self-clearing. ? 0: no action (default) ? 1: reset charger fsw : switching frequency. the switching frequency can be changed only when the device doesn?t switch. shdn input should be pulled high before modifying this setting. ?0: 2 mhz ? 1: 3 mhz (default) dichg_adj : dynamic charging current adjustment enable (for soft-current transitions) ? 0: disabled ? 1: enabled (default) bst_status : otg boost status ? 000: idle ? 001: wait soft-start ? 010: linear soft-start ? 011: switching soft-start ? 100: frequency ramp-up ? 101: otg_run ? 110: pmos-off ? 111: shutdown bst_sh : otg boost output short at beginning ? 0: no short detected (default) ? 1: short detected alarm : alarm state ? 0: no alarm is active ? 1: alarm condition detected preb : pre-bias current activation ? 0: pre-bias current has not been activated ? 1: pre-bias current has been activated (v inovp < v dcin < v inovp_pb for more than t pbd ) table 24. chg_cfg5_otg_status register format (register address: 94h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w bst_sh bst_status - dichg_adj fsw chg_rst 06h r/w table 25. chg_status1 register format (register address: 95h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w chg_status preb_st preb alarm 00h r
docid026474 rev 2 33/40 STBCFG01 i2c compatible interface registers preb_st : pre-bias current sink status ? 0: pre-bias current sink is currently off ? 1: pre-bias current sink is currently on chg_status : charger status ? 00000: idle ? 00001: trickle charge ? 00010: pre-charge ? 00011: fast charge ? 00100: taper charge (constant voltage) ? 00101: charge done (termination) ? 00110: boost on ? 00111: shutdown ? 01000: battery detection running dicl : dynamic input current limit activation ? 0: not active ? 1: active det_run : charger battery detection status ? 0: battery detection doesn?t run ? 1: battery detection runs det_fail: charger battery detection result ? 0: battery connected ? 1: battery not connected for all bits: ? write 1 to propagate the event to irqn ? write 0 to mask the event (default) in_uvlo : charger input voltage uvlo in_ovp : charger input voltage ovp asd : automatic shutdown condition pre_tmr : pre-charge timer expiration table 26. chg_status2 register format (register address: 96h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w - - - - - det_ok det_run dicl c0h r table 27. int_enable_1 register format (register address: 97h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w eoc bat_ovp wd fast_tmr pre_tm r asd in_ovp in_uvlo 00h r/w
i2c compatible interface registers STBCFG01 34/40 docid026474 rev 2 fast_tmr : fast charge timer expiration wd : watchdog timer expiration bat_ovp : battery overvoltage protection eoc : end of charge (termination current reached) for all bits: ? write 1 to propagate the event to irqn ? write 0 to mask the event (default) bat_uvlo : battery uvlo (otg) tshdn : thermal shutdown vbus_ovp : otg boost output ovp ibat_lim : otg battery average current limit otg_short : otg output short-circuit chg_on: charging started bat_fail: battery fail note: this register is cleared upon read operation. in_uvlo : charger input voltage uvlo ? 0: charger input voltage is above uvlo ? 1: charger input voltage is below uvlo in_ovp : charger input voltage ovp ? 0: charger input voltage is below ovp ? 1: charger input voltage is above ovp asd : automatic shutdown condition ? 0: charger input voltage above the automatic shutdown threshold ? 1: charger input voltage below the automatic shutdown threshold pre_tmr : pre-charge timer expiration (has to be cleared by the host) ? 0: pre-charge timer running ? 1: pre-charge timer expired table 28. int_enable_2 register format (register address: 98h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w bat_fail chg_on - otg_short ibat_lim vbus_ovp tshdn bat_uvlo 00h r/w table 29. int_latch_1 register format (register address: 99h) b7 b6 b5 b4 b3 b2 b1 b0 por r/w eoc bat_ovp wd fast_tmr pre_tm r asd in_ovp in_uvlo 00h r/w
docid026474 rev 2 35/40 STBCFG01 i2c compatible interface registers fast_tmr : fast charge timer expiration (has to be cleared by the host) ? 0: fast charge timer running ? 1: fast charge timer expired wd : watchdog timer expiration (has to be cleared by the host) ? 0: watchdog timer running ? 1: watchdog timer expired bat_ovp : battery overvoltage protection ? 0: battery voltage below ovp threshold during charging ? 1: battery voltage above ovp threshold during charging eoc : end of charge (termination current reached) ? 0: termination current not reached ? 1: termination current reached note: write 0 to update these register bits. bat_uvlo : battery uvlo (otg) ? 0: battery voltage above uvlo threshold during boost operation ? 1: battery voltage below uvlo threshold during boost operation tshdn : thermal shutdown ? 0: device in normal operation conditions ? 1: device in thermal shutdown vbus_ovp : otg boost output ovp ? 0: otg boost output voltage below ovp threshold ? 1: otg boost output voltage above ovp threshold ibat_lim : otg battery average current limit (has to be cleared by the host) ? 0: average battery current limit not reached during otg boost operation ? 1: average battery current limit reached during otg boost operation otg_short : otg output short-circuit ? 0: otg output short-circuit condition not detected ? 1: otg output short-circuit condition detected tshdn_ldo : ldo thermal shutdown ? 0: ldo in normal operation conditions ? 1: ldo in thermal shutdown chg_on: charger cycle start ? 0: charging cycle not active ? 1: charging cycle started table 30. int_latch_2 register format (register address: 9ah) b7 b6 b5 b4 b3 b2 b1 b0 por r/w bat_fail chg_on tshdn_ldo otg_short ibat_lim vbus_ovp tshdn bat_uvlo 00h r/w
i2c compatible interface registers STBCFG01 36/40 docid026474 rev 2 bat_fail: battery status (from state machine or rid) ? 0: battery connected/good battery ? 1: battery disconnected/not good
docid026474 rev 2 37/40 STBCFG01 package mechanical data 7 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. figure 10. flip chip 25 (2.3 x 2.2 mm) drawings $ 7499669_h
package mechanical data STBCFG01 38/40 docid026474 rev 2 figure 11. flip chip 25 (2.3 x 2.2 mm) recommended footprint table 31. flip chip 25 (2.3 x 2.2 mm) mechanical data dim. mm min. typ. max. a 0.495 0.55 0.605 a1 0.17 0.20 0.23 a2 0.275 0.30 0.325 b 0.23 0.26 0.29 d 2.25 2.28 2.31 d1 1.6 e 2.16 2.19 2.22 e1 1.6 e0.4 fd 0.33 0.34 0.35 fe 0.285 0.295 0.305 ccc 0.075 $0.05 footprint_7499669_h
docid026474 rev 2 39/40 STBCFG01 revision history 8 revision history table 32. document revision history date revision changes 10-jun-2014 1 initial release. 09-dec-2014 2 added table 2: typical external components table .
STBCFG01 40/40 docid026474 rev 2 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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